In the semiconductor industry, when integrated circuits are fabricated, the expected reliability (for example, lifetime) needs to be determined and provided. This typically involves the determination of the reliability (or lifetime) of the interconnect structures, which include vias and metal lines.
As is known in the art, the reliability of interconnect structures is significantly affected by electro-migration, which is caused by the movement of atoms under the influence of flowing charges. The movement of atoms, in turn, causes voids in the interconnect structure, and, eventually, failure. Electro-migration is typically a long process that may take years. Therefore, the determination of reliability is performed by stressing samples under elevated temperatures and high currents to cause the failure of the samples. The expected reliability under normal operating conditions is then determined using empirical equations or models.
One of the commonly provided reliability data is the maximum allowable current density, which is typically defined as the current density that can flow through the interconnect structure if the integrated circuits are to have, for example, a ten year lifetime with less than 0.1 percent failure rate. To determine the maximum allowable current density, test structures as shown in FIG. 1 are formed and stressed until failure occurs. The data of failed samples are then plotted in a figure, for example, the one similar to FIG. 2, which illustrates cumulative failure as a function of failure time. Typically, the lifetime of test structures is limited by early failures, which mostly occur in vias. Intrinsic failures, which mostly occur in metal lines, are typically not a limiting factor of the lifetime of test structures. The maximum allowable current is then calculated based on the number and distribution of early failures.
FIG. 2 illustrates that samples with shorter lifetimes are shown to the left, which indicates early failures, while samples with longer lifetimes are shown to the right, which indicates intrinsic failures. FIG. 2, however, does not provide the dividing point between early failures and intrinsic failures. One of the methods used to determine early failures is to perform a scanning electron microscope (SEM) on each sample to determine the exact location of the failure in the samples. This method, however, is costly and time consuming. Another method is to determine the dividing portion by estimation. This method is quick but subjective. For example, a first person might think that line A is the dividing line, and points to the left of line A are early failure samples. A maximum allowable current density is thus calculated as 0.95 mA/cm2. A second person and a third person, on the other hand, might think lines B and C are dividing lines, and, accordingly, the maximum allowable current densities are calculated as 0.64 mA/cm2 and 0.43 mA/cm2, respectively. Accordingly, a better method for determining the dividing line (point) is needed.